mkashirin/rvmz
RVMZ (RASP Virtual Machine in Zig) is a virtual machine designed to interpret the Restricted Access Sequence Processing language.
RVMZ (RASP Virtual Machine in Zig) is a virtual machine designed to interpret the Restricted Access Sequence Processing language.
RVMZ is a work-in-progress project. For now, it only builds an AST for the program.
Look into the main.zig. Here is a RASP program stored in the source variable:
an_int = 1;
the_int = 23;
def add(a, b) {
sum = a + b;
return sum;
}
int_sum = add(a_int, the_int);
print("Success") if c > 0 else print(0);
0 if an_int - the_int and the_int - an_int else int_sum or "Huh?";
a_list = [1, 2, 3];
a_dict = {"integer": 1, "list": [2, 3]};
the_list = [0, {"one": 1}, 2 + 3];
zero = the_list[a_list[0]];
for n in a_list {
print(n + 1);
}
zero_in_the_list = 0 in the_list;
selector = Select([1, 2, 3], [1, 2, 3], ==);
list_comp = [i + 1 if i > 0 else i for i in a_list];
And there is the AST the program would produce:
Parsed AST (index-backed):
AssignStmt(name: an_int)
Int(1)
AssignStmt(name: the_int)
Int(23)
FnDef(name: add)
Args:
Arg: a
Arg: b
Body:
AssignStmt(name: sum)
BinExpr(+)
Identifier(a)
Identifier(b)
ReturnStmt:
Identifier(sum)
AssignStmt(name: int_sum)
FnCall(name: add)
Args:
Identifier(a_int)
Identifier(the_int)
CondExpr
Then:
FnCall(name: print)
Args:
String("Success")
If:
BinExpr(>)
Identifier(c)
Int(0)
Else:
FnCall(name: print)
Args:
Int(0)
CondExpr
Then:
Int(0)
If:
BinExpr(and)
BinExpr(-)
Identifier(an_int)
Identifier(the_int)
BinExpr(-)
Identifier(the_int)
Identifier(an_int)
Else:
BinExpr(or)
Identifier(int_sum)
String("Huh?")
AssignStmt(name: a_list)
List
Int(1)
Int(2)
Int(3)
AssignStmt(name: a_dict)
Dictionary
Pair
String("integer")
Int(1)
Pair
String("list")
List
Int(2)
Int(3)
AssignStmt(name: the_list)
List
Int(0)
String("one")
Int(1)
AssignStmt(name: zero)
IndexExpr
Target:
Identifier(the_list)
Index:
IndexExpr
Target:
Identifier(a_list)
Index:
Int(0)
ForStmt(var: n)
Iterable:
Identifier(a_list)
Body:
FnCall(name: print)
Args:
BinExpr(+)
Identifier(n)
Int(1)
AssignStmt(name: zero_in_the_list)
BinExpr(in)
Int(0)
Identifier(the_list)
AssignStmt(name: selector)
FnCall(name: Select)
Args:
List
Int(1)
Int(2)
Int(3)
List
Int(1)
Int(2)
Int(3)
SelectorPred(==)
AssignStmt(name: list_comp)
ListComp
Expr:
CondExpr
Then:
BinExpr(+)
Identifier(i)
Int(1)
If:
BinExpr(>)
Identifier(i)
Int(0)
Else:
Identifier(i)
Variable: i
Iterable:
Identifier(a_list)